Ideal Diode Rectification with Unipolar Gate-controllability in a Back-gated Graphene/ WS2 Heterostructure

Meng Zhan Li^1*, Jyun Yan Siao¹, Minn Tsong Lin^1,2,3

¹Department of Physics, National Taiwan University, Taipei, Taiwan
²Institute of Atomic and Molecular Sciences, Academia Sinica, Taipei, Taiwan
³Research Center for Applied Sciences, Academia Sinica, Taipei, Taiwan

* Presenter:Meng Zhan Li, email:abcc102072@gmail.com

In this work, we demonstrate a current rectifying behavior in a few-layer graphene (FLG) and multi-layer WS2 heterostructure. The output characteristic well obeyed the Shockley ideal diode equation in low bias region, and a large rectification ratio up to 106 was observed. Moreover, our device possessed a special unipolar gate- controllability that only the forward-bias region is electrostatically tunable, which could be attributed to the partial gating feature due to the stacking order in our device fabrication. Accordingly, we sketch the band diagram and analyze the working mechanism of our device. Finally, we estimate the Schottky barrier height (SBH) of the graphene/ WS2 interface by the thermionic emission theory, finding the value consistent with that predicted by the Schottky-Mott rule. The result indicates the ideal vdW interface is immune to Fermi level pinning.
This project is financially sponsored by Ministry of Science and Technology (MOST 110-2112-M-002-032).

Keywords: Low dimensional material, van der Waals heterostructure, Current rectification